Display Hackfest Intel

Topics from Intel

Tear Reduction/Smooth (A)Sync

← 2026

Overview

Different levels of smoothening

Performance penalty

Enabling Smooth Sync reduces async flip throughput. The higher the level, the greater the performance cost.

Test: kms_async_flips --r async-flip-speed-test on Wildcat Lake (Linux 6.19.0-rc4) on an HD display

Subtest Baseline (flips/vblank) Level 1 (flips/vblank) Level 5 (flips/vblank)
pipe-A-eDP-1-4 6537 3109 713
pipe-B-eDP-1-4 6600 2543 712
pipe-C-eDP-1-4 6538 3177 713

At level 1 the flip count drops to ~50% and at level 5 it drops to ~10% of the baseline.